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april 2012 ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 FAN7340 ? led backlight driving boost switch FAN7340 led backlight driving boost switch features ? single-channel boost led switch ? internal power mosfet for pwm dimming: r ds(on) = 3.4 at v gs =10v, bv dss =400v ? current mode pwm control ? internal programmable slope compensation ? wide supply voltage range: 10v to 35v ? led current regulation: 1% ? programmable switching frequency ? analog and pwm dimming ? wide dimming ratio: on time=10s to dc ? cycle-by-cycle current limiting ? thermal shutdown: 150 c ? open-led protection (olp) ? over-voltage protection (ovp) ? over-current protection (ocp) ? error flag generation (for external load switch) ? internal soft-start ? 16-lead soic package applications ? led backlight for lcd tv ? led backlight for lcd monitor ? led lighting description the FAN7340 is a single-channel boost controller that integrates an n-channel power mosfet for pwm dimming using fairchild?s proprietary planar double- diffused mos (dmos) technology. the ic operates as a constant-current source for driving high-current leds. it uses current mode control with programmable slope compensation to prevent subharmonic oscillation. the ic provides protections incl uding: open-led protection, over-voltage protection, and direct-short protection for high system reliability. the ic internally generates a fault signal with delay if an abnormal led string condition occurs. pwm dimming and analog dimming functions can be implemented independently. internal soft-start prevents inrush current flowing into output capacitor at startup. ordering information part number operating temperature range package packaging method FAN7340m -40c to +125c 16-lead, small-ou tline integrated circuit (soic) rail FAN7340mx tape & reel
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 2 FAN7340 ? led backli g ht drivin g boost switch block diagram figure 1. internal block diagram
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 3 FAN7340 ? led backli g ht drivin g boost switch pin assignments figure 2. package diagram pin definitions pin # name description 1 vcc this pin is the supply voltage of the ic. 2 drv this pin is the gate driv e signal of the boost switch. 3 gnd this pin is the ground of the ic. 4 cs this pin is for sensing the current flowing thro ugh an external mosfet. it includes a built-in 300ns blanking time. the peak of the current fl owing through the mosfet is limited to this pin voltage. slope compensation of the boos t controller can be programmed through the series resistor of this pin. 5 ref this pin is the 5v reference voltage pin. maximum current capability is 3ma. 6 fault this pin is for indicating the fault signal. this pin is connected to the open drain. when olp protection is occurred, the fault pin is pulled high. 7 rt oscillator frequency set of the boost switch (50khz ~ 300khz). 8 sense this pin is for sensing the current flowing th rough the leds. a sensing resistor is connected from this pin to ground. this pin is connec ted to the negative input of the internal error amplifier. 9, 10 drain drain pin of pwm dimming power mosfet. 12 ena enable input pin. if voltage of this pin is high er than 1.22v, ic is st arting to operate. if the voltage of this pin is lower th an 1.15v, the ic stops operating. 13 ovp over-voltage protection input pin. output voltage of the boost circuit is connected to this pin through a resistor divider circuit. if this pin voltage is higher than 3v, ovp is triggered. 14 cmp this pin is the error amplifier output. typica lly, a compensation capacitor and resistor are connected to this pin from the ground. 15 adim this pin is for setting the current flowing thro ugh the leds. this pin is connected to the positive inputs of the internal error amplifier. linear voltage range of adim is 0.3v~3.0v. 16 bdim this pin is for the burst dimming signal. if th is pin voltage is high, the internal dimming mosfet is turned on. if this pin voltage is low, the dimming mosfet is turned off. note: 1. pin 11 is a ?no connect? pin (not shown in figure 2).
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 4 FAN7340 ? led backli g ht drivin g boost switch absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the devic e may not function or be operable above the recommended operating conditions and stressi ng the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommend ed operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. t a =25 ? c unless otherwise specified. symbol parameter min. max. unit v cc supply voltage 10 35 v t a operating temperature range -40 +125 ? c t j junction temperature +150 ? c t stg storage temperature range -65 +150 ? c ? ja thermal resistance junction-to-ambient (2, 3) 120 ? c/w p d power dissipation 0.9 w notes: 2. thermal resistance test board; si ze 76.2mm x 114.3mm x 1.6mm (1s0p); jedec standard: jesd51-2, jesd51-3. 3. assume no ambient airflow. pin breakdown voltage pin # name value unit pin # name value unit 1 vcc 35 v 9 drain 400 v 2 drv 20 v 10 drain 400 v 3 gnd v 11 n/a v 4 cs 6 v 12 ena 6 v 5 ref 6 v 13 ovp 6 v 6 fault 35 v 14 cmp 6 v 7 rt 6 v 15 adim 6 v 8 sense 6 v 16 bdim 6 v
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 5 FAN7340 ? led backli g ht drivin g boost switch electrical characteristics for typical values, t a = 25c and v cc = 15v unless otherwise specified. specifications to -40c ~ 125c are guaranteed by design based on final characterization results. symbol parameter condition min. typ. max. unit supply voltage section v cc input dc supply voltage range (4) 10 35 v i sd shutdown mode supply current bdim connected to gnd 2 4 ma under-voltage lockout section v th start threshold voltage 8.3 9.0 9.7 v v th,hys start threshold voltage hy steresis 0.5 1.0 1.5 v i st standby current v cc =v th -0.2 200 300 a on/off section v on on-state input voltage 2 5 v v off off-state input voltage 0.8 v error amplifier section g m error amplifier transconductance (4) v adim =1v 100 300 500 mho a v_ro error amplifier output impedance (4) 20 m ? a v error amplifier open-loop gain (4) 60 db v offset input offset voltage v adim =1v -10 10 mv i sin cmp sink current v adim =1v, v sense =2v 100 200 300 a i sur cmp source current v adim =1v, v sense =0v 100 200 300 a v idr input differential voltage range 0 3 v v o output voltage range 0.7 4.0 v oscillator section f osc boost oscillator frequency min. 50 khz r t =100k ? 190 200 210 khz max. 300 khz d max maximum duty cycle (4) 86 90 94 % reference section v ref 5v regulation voltage 4.9 5.0 5.1 v v ref,line 5v line regulation 25 mv v ref,load 5v load regulation 0 ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 6 FAN7340 ? led backli g ht drivin g boost switch electrical characteristics (continued) for typical values, t a = 25c and v cc = 15v, unless otherwise specified. specifications to -25c ~ 85c are guaranteed by design based on final characterization results. symbol parameter condition min. typ. max. unit output section (boost / dimming) v drv gate output voltage v cc =15v 10.8 11.8 12.8 v v uv gate output voltage befo re startup -0.5 0.5 v i dsur gate output drive source current (4) 80 180 280 ma i dsin gate output drive sink current (4) 80 180 280 ma t rh gate output rising time (boost) (4) c l =2.0nf 200 ns t fl gate output falling time (boost) (4) c l =2.0nf 120 ns current sense section t blank leading-edge blanking (4) 150 300 450 ns t delay,cl delay to output of current-limit comparator (4) 180 ns v offset,clc offset voltage of current-limit comparator (4) -20 20 mv slope compensation section i slope ramp generator current 36 45 54 a r slope slope compensation resistor (4) 5 k ? soft-start section t ss soft-start period (4) f osc =200khz 3 ms protection section t d,ovp.tr delay for triggering over-voltage protection (4) 15 20 25 s t d,ovpr delay for releasing over-voltage protection (4) 10 14 18 s t d.ocp delay for over-current protection (4) 1 s t ar auto-restart time for over-current protection (4) f osc =200khz 640 s t d,olpi delay for triggering open-led protection (4) 3 5 7 s t d,olp delay for open-led protection f osc =200khz 40.96 ms v th,ovp over-voltage protection threshold voltage 2.85 3.00 3.15 v v hys,ovp over-voltage protection voltage hysteresis 0.1 v v th.csocp boost switch current limit threshold voltage 0.45 0.50 0.55 v v th,ocp led over-current protection threshold voltage 1.4 (min. clamp) 4.0xv adim 4.0 (max. clamp) v v th,olp open-led protection threshold voltage (4) 0.15 0.20 0.25 v t sd thermal shutdown temperature (4) 140 150 160 c t hys thermal shutdown hysteresis (4) 20 c notes: 4. these parameters, al though guaranteed, are not tested in production.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 7 FAN7340 ? led backli g ht drivin g boost switch typical performance characteristics figure 3. start threshold voltage vs. temperature figure 4. start threshold v oltage hysteresis vs. temperature figure 5. standby current vs. temperature figure 6. shutdown mode supply current vs. temperature figure 7. on-state input v oltage vs. temperature figure 8. of f -state input voltage vs. temperature 8.1 8.3 8.5 8.7 8.9 9.1 9.3 9.5 9.7 9.9 -50 -25 0 25 50 75 100 125 v th , [v] temperature, [] 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 -50 -25 0 25 50 75 100 125 v th.hys , [v] temperature, [] 50 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 i st , [ua] temperature, [] 0.5 1 1.5 2 2.5 3 3.5 4 4.5 -50 -25 0 25 50 75 100 125 i sd , [ma] temperature, [] 1.05 1.1 1.15 1.2 1.25 1.3 1.35 1.4 -50 -25 0 25 50 75 100 125 v on , [v] temperature, [] 1 1.05 1.1 1.15 1.2 1.25 1.3 -50 -25 0 25 50 75 100 125 v off , [v] temperature, []
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 8 FAN7340 ? led backli g ht drivin g boost switch typical performance characteristics (continued) figure 9. error amplifier transconductance vs. temperature figure 10. input offset voltage vs. temperature figure 11. cmp sink current vs. temperature figure 12. cmp source current vs. temperature figure 13. boost oscillator frequency vs. temperature figure 14. maximum duty cycle vs. temperature 0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 g m , [umho] temperature, [] -14 -10 -6 -2 2 6 10 14 -50 -25 0 25 50 75 100 125 v offset , [mv] temperature, [] 50 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 i sin , [ua] temperature, [] 50 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 i sur , [ua] temperature, [] 185 190 195 200 205 210 215 -50 -25 0 25 50 75 100 125 f osc , [khz] temperature, [] 84 86 88 90 92 94 96 -50 -25 0 25 50 75 100 125 dmax, [%] temperature, []
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 9 FAN7340 ? led backli g ht drivin g boost switch typical performance characteristics (continued) figure 15. 5v regulation voltage vs. temperature figure 16. pwm dimming input high voltage vs. temperature figure 17. pwm dimming input low voltage vs. temperature figure 18. pwm dimming pull-down resistance vs. temperature figure 19. gate output voltage vs. temperature figure 20. gate output drive sink current vs. temperature 4.85 4.9 4.95 5 5.05 5.1 5.15 -50 -25 0 25 50 75 100 125 v ref , [v] temperature, [] 1.2 1.3 1.4 1.5 1.6 1.7 1.8 -50 -25 0 25 50 75 100 125 v pdim,h , [v] temperature, [] 1.1 1.2 1.3 1.4 1.5 1.6 1.7 -50 -25 0 25 50 75 100 125 v pdim,l , [v] temperature, [] 80 100 120 140 160 180 200 220 240 -50 -25 0 25 50 75 100 125 r pdim , [kohm] temperature, [] 10.5 11 11.5 12 12.5 13 13.5 -50 -25 0 25 50 75 100 125 v drv , [v] temperature, [] 50 100 150 200 250 300 -50 -25 0 25 50 75 100 125 i dsin , [ma] temperature, []
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 10 FAN7340 ? led backli g ht drivin g boost switch typical performance characteristics (continued) figure 21. ramp generator current vs. temperature figure 22. a uto-restart time for ocp vs. temperature figure 23. o v p threshold voltage vs. temperature figure 24. ovp hysteresis voltage vs. temperature figure 25. delay for ove r -current protection vs. temperature 35 39 43 47 51 55 -50 -25 0 25 50 75 100 125 i slope , [ua] temperature, [] 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 -50 -25 0 25 50 75 100 125 t ar ,[ms] temperature, [] 2.8 2.85 2.9 2.95 3 3.05 3.1 3.15 3.2 -50 -25 0 25 50 75 100 125 v th,ovp ,[v] temperature, [] 0 0.04 0.08 0.12 0.16 0.2 -50 -25 0 25 50 75 100 125 v hys,ovp ,[v] temperature, [] 25 30 35 40 45 50 55 -50 -25 0 25 50 75 100 125 t d,olp ,[ms] temperature, []
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 11 FAN7340 ? led backli g ht drivin g boost switch functional description the FAN7340 operates as a cons tant-current source for driving high-current leds. it uses current-mode control with programmable slope compensation to prevent sub- harmonic oscillation. the ic provides protections such as open-led protection, over-voltage protection, and over-current protection for improved system reliability. the ic internally generates a fault out signal with a delay in case an abnormal led string condition occurs. pwm dimming and analog dimming functions can be implemented independently. in ternal soft-start prevents inrush current flowing into output capacitor at startup. circuit operation is explained in the following sections. v cc under-voltage lockout (uvlo) an internal regulator provides the regulated 5v used to power the ic. the under-voltage lockout (uvlo) turns off the ic in the event of the voltage dropping below the specific threshold level. the uvlo circuit inhibits powering the ic until a voltage reference is established ,up to predetermined threshold level. enable applying voltage higher than 1.22v (typical) to the ena pin enables the ic. applying voltage lower than 1.15v (typical) to the ena pin disables the ic. if ena pin voltage is higher than 1.22v (typical) and v cc is higher than 9.0v (typical.), the ic starts to supply 5v reference voltage from v cc . oscillator (boost switching frequency) boost switching frequency is programmed by the value of the resistor connected from the rt pin to ground. rt pin voltage is set to 2v. the current through the rt pin resistor determines boost switching frequency according to formula: f . khz (1) soft-start function at startup during initial startup, the switching device can be damaged due to the over-current coming from the input line by the negative control. th is can result in the initial overshoot of the led curren t. therefore, during initial startup, the soft-sta rt control gradually increases the duty cycle so that the output voltage can rise smoothly to control inrush current and overshoot. FAN7340 adapts the soft-start function in the boost converter stage. during soft-start period, boost switch turn-on duty is limited by clamped cmp voltage. the soft-start period is dependent on boost switching frequency, which is decided by the rt resistor (equation 1). soft-start period is set to be cumulative time when the bdim (pwm dimming) signal is high: t 600 / f sec (2) figure 26. soft-start waveforms led current setting during the boost converter operating periods, the output led current can be set by equation: i adimv r 60m ? (3) where adim(v) is adim pin applied voltage and, r sense is the sensing resistor value. an additional 60m comes from an internal wire bonding resistor. to calculate led current precisely, consider the wire bonding resistor. analog dimming and pwm dimming analog dimming is achieved by varying the voltage level at the adim pin. this can be implemented either with a potentiometer from the vref pin or from an external voltage source and a resistor divider circuit. the adim voltage level is adjusted to be the same as the feedback level (v sense ). a v adim range from 0.3v to 3v is recommended. pwm dimming (bdim) helps achieve a fast pwm dimming response in spite of the shortcomings of the boost converter. the pwm dimming signal controls three nodes in the ic; gate signal to the switching fet, gate signal to the dimming fet, and output connection of the trans-conductance amplifier. when the pwm dimming signal is high, the gates of the switching fet and dimming fet are enabled. at the same time, the output of the transconductance ap-amp is connected to the compensation network. this allows the boost converter to operate normally. dynamic contrast ratio the dynamic contrast ratio (dcr) means the maximum contrast ratio achievable by adjusting the amount of light (dimming) of the screen instantaneously using the backlight during the extremely short period of time. FAN7340 can normally drive the led backlight under 0.1% dimming duty cycle at 200hz dimming frequency. even operating at 5s-dimming fet turn-on time and extremely low dimming duty, FAN7340 can operate leds with normal peak current level.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 12 FAN7340 ? led backli g ht drivin g boost switch internal dimming mosfet a dimming mosfet (400v n-channel mosfet; such as fdd3n40) is incorporated in the FAN7340. the power transistor is produced using fairchild?s proprietary, planar stripe, dmos technology. this advanced technology is tailored to minimize on-state resistance (r ds(on) =3.4 ? ), to provide superior switching performance. this device is suited for high-efficiency smps and shows desirable thermal characteristic during operation. to prevent initial led current overshoot at low v adim levels, gate resistance of the internal dimming fet is designed as 5k ?? experimentally. feedback loop compensation stable closed-loop control can be accomplished by connecting a compensation network between comp and gnd. the compensation needed to stabilize the converter can be either a type-i circuit (a simple integrator) or a type-ii circuit (and integrator with and additional pole-zero pair). the type of the compensation circuit required is dependent on the phase of the power stage at the crossover frequency. FAN7340 adopts a type-ii compensator circuit. programmed current control FAN7340 uses a current-mode control method. current- mode control loops: an outer feedback loop that senses output voltage (current) and delivers a dc control voltage to an inner feedback loop, which senses the peak current of the inductor and keeps it constant on a pulse-by-pulse basis. one of the advantages of the current-mode control is line/lo ad regulation, which is corrected instantaneously against line voltage changes without the delay of an error amplifier. programmable slope compensation when the power converter operates in continuous conduction mode (ccm), the current programmed controller is inherently unstable when duty is larger than 50%, regardless of the converter topology. the FAN7340 uses a peak-current-mode control scheme with programmable slope compensation and includes an internal transconductance amplifier to accurately control the output current over all line and load conditions. an internal r slope resistor (5k ? ) connected to sensing resistor r s and an external resistor r 1 can control the slope of v sc for the slope compensation. although the normal operating mode of the power converter is dcm, the boost converter operates in ccm in the case of rapid led current increase. as a result, slope compensation circuit is an important feature. the value of an external series resistor (r 1 ) can be programmed by the user. in normal dcm operation, 5k is recommended. figure 27. slope compensation block diagram cycle-by-cycle over-current protection in boost topology, the switch can be damaged in abnormal conditions (inductor short, diode short, output short). it is always necessary to sense the switch current to protect against over-current failures. switch failures due to excessive current can be prevented by limiting i d. figure 28. cycle-by-cycle ocp circuit when the voltage drops at r 1 and r s exceed a threshold of approximatel y 0.5v, the power mosfet over-current function is triggered after minimum turn-on time or leb time (300ns). the peak voltage level at cs terminal: v _ 45 r r dt i r (4) choose the boost switch current-sensing resistor (r cs ): r 0.25 i _ (5) open-led protection (olp) after the first pwm dimming-high signal, the feedback sensing resistor (rsense) starts sensing the led current. if the feedback voltage of the sense pin drops below 0.2v, the olp triggers to generate an error flag signal. because olp can be detected only in pwm dimming-high; if olp detecting time is over 5 s, pwm dimming signal is pulled high internally regardless of external dimming signal. if olp signal continues over blanking time, an error flag signal is triggered. olp blanking time is dependent on boost switch frequency per equation 6. fault out signal is made through the fo pin, which needs to be connected 5v reference voltage through a pull-up resistor. in normal operation, fo pin voltage is pulled down to ground. in olp condition, fo pin voltage is pulled high. t . 8192 / f sec (6)
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 13 FAN7340 ? led backli g ht drivin g boost switch in system operation, olp is triggered in only direct-short condition. direct short means that some point of the led string is shorted to set ground. in direct-short condition, the boost controller cannot co ntrol the led current and a large current flows into the led string directly from input power. to prevent this abnormal condition, the fo signal is used to turn off input power or the total system. fo signal is only triggered in olp condition. figure 29. open-led protection in led open load condition, ovp is triggered ahead of olp. over-voltage protection (ovp) over-voltage protection is tr iggered when the voltage of the external output voltage trip point meets 3v. after triggering ovp, the dimming sw itch and boost switch are turned off. the protection signal is recovered when the output voltage divider is below 2.9v. figure 30. over-voltage trip point figure 31. o v p trigger and release led over-current protection (ocp) the primary purpose of the over-current protection function is to protect the in ternal dimming mosfet from excessive current. the ocp is triggered when the feedback voltage meets the clamping level (1.4v ~ 4v) of the adim voltage x4. at 1 s delay after the ocp is triggered, the ic turns off both the boost fet and dimming fet and restarts the gate signal every t ar automatically. t ar can be calculated as: 128 / f sec (7) 1. when v adim =0.3v (v adim x4=1.2v). 2. ocp threshold level is set to 1.4v. 3. ocp is triggered at feedback voltage level = 1.4v. v sense v adim =0.3v v sense =1.4v gate figure 32. ocp waveforms at v adim =0.3v 1. when v adim =0.8v (v adim x4=3.2v). 2. ocp threshold level is set to 3.2v. 3. ocp is triggered at v sense = 3.2v. figure 33. ocp waveforms at v adim =0.8v 1. when v adim =1.2v (v adim x4=4.8v). 2. ocp threshold level is set to 4.0v. 3. ocp is triggered at v sense = 4.0v. gate figure 34. ocp waveforms at v adim =1.2v
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 slc1012c ? led backlight driving boost switch typical application circuit (b oost topology for led backlight) application input voltage range rated output power output current (rated voltage) led led backlight tv 120v dc ? 10% 250ma (230v) 72-leds/1-string features ? high efficiency ? constant current boost converters ? high-voltage, high-current led driving typical application circuit figure 35. typical application circuit r12 100k r14 20k ic1 FAN7340 fo 6 ref 5 sense 8 drain 9 rt 7 gnd 3 cs 4 drv 2 drain 10 cmp 14 ena 12 1 vcc ovp 13 bdim 16 adim 15 vcc r20 100k adim r16 2.7r/1w cn1 con6 vin 1 vin 2 vin 3 gnd 4 gnd 5 gnd 6 c13 1.2n c10 1.2n cn3 con6 gnd 2 o n/of f 6 adim 5 bdim 4 vcc 1 fo 3 c8 10n cn2 con6 n.c 1 n.c 2 vled 3 vled 4 led1 5 led2 6 c5 open r19 10k r22 330k r23 10k c6 6.8n c12 1.2n r11 15k r7 5.1k c7 100n r9 0r FAN7340 d3 1n4148 r21 330k fo fo 0 on/of f adim ovp r13 3.9k r15 220k 0 c1 22uf/160v c3 10uf/50v l1 200uh/pc44 r5 300k dsp on/of f q1 fpdf7n50nf r1 10r d1 ffd04h60s c4 1u r6 300k d2 1ss355 r10 11k r8 0.2r/1w 0 ovp vin : 120v vout : 230v output current : 250ma switching frequency : 200khz tp1 tp r2 300k r17 3.9k r18 220k c11 1.2n bdim bdim ena r4 100k c2 47uf/400v vcc ena
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 15 FAN7340 ? led backli g ht drivin g boost switch physical dimension figure 36. 16-lead, small outline integrated circuit (soic) package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packa ging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. x 45 detail a scale: 2:1 8 0 notes: unless otherwise specified a) this package conforms to jedec ms-012, variation ac, issue c. b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash and tie bar protrusions d) conforms to asme y14.5m-1994 e) landpattern standard: soic127p600x175-16am f) drawing file name: m16arev12. seating plane gage plane c c 0.10 see detail a land pattern recommendation pin one indicator 1 16 8 m 0.25 9 cba b a 5.6 1.27 0.65 1.75 10.00 9.80 8.89 6.00 1.27 (0.30) 0.51 0.35 1.75 max 1.50 1.25 0.25 0.10 0.25 0.19 (1.04) 0.90 0.50 0.36 (r0.10) (r0.10) 0.50 0.25 4.00 3.80
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7340 ? 1.0.0 16 FAN7340 ? led backli g ht drivin g boost switch

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